In the prior art, there is the LOC configuration with a lead frame set on the IC chip as a package for sealing the IC chip. This can be explained with reference to FIGS. 10 and 11.
As shown in FIG. 10, the LOC-structure DRAM (dynamic RAM) has multiple bonding pads 1 set on a straight line at the central portion of IC chip 10. On the two sides of the pad column are power-source lines 42, 43, known as bus bars, that form the lead frame for LOC and are made of iron-nickel alloy, copper alloy or copper, as well as multiple signal lines (lead frame) 44, 45.
Bus bars 42, 43 are connected to power source Vss or Vcc. On the other hand, signal lines 44, 45 are used for addresses A0 through A10 as well as CAS, RAS or other signals.
Connection between each pad 1 and each line is performed by means of bonding wires 6, 7 on one side (the left side) of the bonding-pad column; it is performed by means of bonding wires 8, 9 on the other side (the right side). As shown explicitly in FIG. 11, wires 7, 9, which connect signal lines 44, 45 to pad 1 stride over bus bars 42, 43, respectively.
Consequently, when wires 7 and 9 are not sufficiently high, they may be in contact with bus bars 42, 43, and there is the danger that a short-circuit will formed between the signal lines and the bus bars. In order to prevent this problem, the height of wires 7, 9 must be sufficiently large. This, however, hampers the effort to reduce the thickness of the resin-mold package.
As shown in FIG. 12, on IC chip 10, bonding pads BP are set in one column on each of the left and right sides. On the two sides of each pad column, signal lines 3A1 and bus bars 3A2 are set. Connection by bonding wire W is performed for each pad column by means of signal lines on one side and by means of bus bars on the other side. Consequently, the wires no longer stride the bus bars as described in the above, and the short-circuit between the signal lines and the bus bars can be entirely avoided for this lead frame.
However, for the package shown in FIG. 12, signal lines 3A1 can be set only on one side with respect to a pad column; hence, the efficiency is poor, and the layout is also limited. In addition, as the pin number is increased, the pitch distance among the signal lines becomes smaller, and there is little tolerance.
An object of this invention is to provide a type of package-structure semiconductor device, characterized by the fact that the short-circuit between the signal lines and bus bars can be prevented, the thickness of the package can be reduced, and the signal lines can be set easily, with the connection made at a high efficiency.